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3 ARM与FPGA的编程控制[2]

采用硬件描述语言VerilogHDL，对LTC2207相关引脚的使能以及FPGA如何读取采集来的数据的程序如下：

always @(posedge clk or negedge rst_n)

if(!rst_n)

begin

/OE2_2207 = 1b0;//相关引脚的软件配置

MODE2_2207 = 1b1;

RAND2_2207 = 1b0;

PGA2_2207 = 1b0;

DITH2_2207 = 1b1;

SHDN2_2207 = 1b0;

DATA2_receive = 16d0;

state = IDLE;

done2 = 1b0;

end

else

begin

case(state)

IDLE: if(start_reg)

begin

en_9150 =1;

state = READ_DATA;

end

READ_DATA:

begin//FPGA读取采集来的数据

en_9150 =0;

if(CLKp2_2207_reg)

begin

DATA2_receive = DATA2_2207;

done2 = 1b1;

state = IDLE;

end

else

done2 = 1b1;

end

default: ;

endcase

end

与S3C2440 GPJ1口连接的FPGA端的start控制程序代码如下[3]：

always @(posedge clk or negedge rst_n)

if(!rst_n)

begin

start_reg1 = 0;

start_reg2 = 0;

end

else

begin

start_reg1 = start;

start_reg2 = start_reg1;

end

assign start_reg = start_reg1 (～start_reg2);

S3C2440控制启动FPGA开始采集的start程序如下[4]：

#include

#include 2440addr.h

#include 2440lib.h

#include def.h

#include fpga.h

void delay(int a) {//延迟

int k;

for(k=0;k

}

void start(){

rGPJCON=(12)+(06); //设置I/O口GPJ1为输出属性，GPJ3为输入属性

rGPJUP=0x1fff;//禁止GPJ端口的上拉

rGPJDAT=(01);//初始化时置低电平

while(1) {

rGPJDAT=(11);//GPJ1置高

delay(50);

rGPJDAT=(01);//GPJ1置低

delay(500);

}

}

关键词： 2207 FPGA ARM LTC